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Vlsi Design Engineer Resume Samples
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6-10 years of experience
Led statistical analysis project and achieved 50% reduction in turnaround times in Synopsys DC.
- Developed 100M FET bridge chips. Roles included: timing and functional verification; custom cell and block design; standard cell library and block design; clock skew analysis; design for test, and Verilog design.
- Wrote successful bids for ASIC team projects leading to >$100M lifetime revenue.
- Designed and verified VLSI standard cell, datapath, and custom circuits.
- Developed and implemented chip-level timing verification methodology with hierarchical process, Synopsys Primetime, and Perl, Tcl and ksh scripting. Led rapid timing verification efforts.
6-10 years of experience
Served as an integral member of the international design team, designing, developing and engineering MPC5XX family of the highly popular automotive single chip microcontrollers (with total revenue over $1 billion).
- Developed successful flow for migrating embedded Power PC core design over several process nodes. Enhanced the core with a new bus interface unit with real time application code decompression feature, allowing up to 100% more application code to be stored in the microcontroller internal flash. Registered several patents on the subject.
- Led a team of 10 engineers in the functional test coverage enhancement of the MPC5XX microcontrollers. Increased fault coverage from ~50% to more than 98%, reducing customer return rate to single digit PPM (parts per million). Developed over 400 functional patterns, written with PowerPC assembler language. Maintained and updated the embedded PowerPC core verification environment, including model build and patterns compilation Perl scripts, random pattern generation scripts, designed verifault environment for the core patterns stuck at fault grading, including Perl based scripts to convert tester stimulus to verilog memory based tester model, extract detected faults lists, create new undetected fault lists, run simulations, generate reports, visualize undetected faults, drawing schematics with remains faults.
- Provided MPC5XX parts customer support, helping resolve application problems.
0-5 years of experience
Designed interface between TV Encoder and TV Decoder for Mojo and Minime.
- Developed test bench for TV Encoder and TV Decoder. Verified them in module level and system level for Mojo and Minime Chip.
- Chip bring up of Mojo and Minime.
- USB Buffer Display Project. A Xilinx FPGA design. It enables people to see and exam the video signal without having an actual chip.
- Designed Run Length decoder for sub-picture module. It is used in Mojo chip.
- Video Preprocess Project. Designed in Verilog and tested its functionalities in a Xilinx
0-5 years of experience
Cyrix Corporation was technology leader in the high performance x86 microprocessor field.
- Key member of team responsible for taking microprocessor designs from conception to completion.
- Developed well rounded skill set including skills like architectural definition, behavioral coding, synthesis, schematic capture, timing, floor planning, placing and routing of high performance superscalar, super pipelined microprocessor designs.
- Independent responsibility for coding, floor planning, synthesis, placing, routing and timing of cache control (mq, dc) and bus control (rq) units.
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Vlsi Design Engineer
Last edited by: Gabriela Barcenas, CPRW, Content Writer II -
Gabriela Barcenas
CPRW, Content Writer IIGabriela is a Certified Professional Resume Writer (CPRW) and career adviser. With 10 years of digital media experience and five years of resume writing expertise, her publication history includes fashion, education, travel, social justice, equitable design and career advice.
