Principal Hardware Verification Engineer
Designed, developed and led verification of three FPGAs for the two [company name] Clearpath "top of the line" Enterprise Servers. Architectures included two [company name] processors, DDR3, LVDS, PCIE, proprietary Caching and crossbar, and maintenance I2C.
- Completed goals of design and verification on time and under budget. Verified block level, FPGAs, board level, and multi-board level.
- Increased test writing productivity by 20%. Created automatic initialization, programmable initialization, self updating, low maintenance code. Used intelligent hardware models.
- Laid the foundation for scheduling people and machines by writing the simulation verification test-plan for the project. Documented the tools, methods, test areas, test benches, and test cases for over 80 people at two sites.
- Leveraged best practices. Wrote four design guides by Platform and Language. Documented the latest rules and methods for design entry and simulation. Unix based, TCL, Verilog, and windows.
- Maximized team potential through guidance and training.