ASIC Verification Engineer
Primary Responsibilities include testbench development, testcases generation, regressions run and analysis, functional and code coverage run and analysis, running gate level simulations and regressions, running gate level simulations with SDF, developing and optimizing scripts for pre and post processing.
- Worked on 802.11 PHY Baseband block on 3 projects where we developed and enhanced the testbench environment and created testcases for different sub-blocks and different scenarios.
- Worked on the digital block of 2 RFIC chip projects where I worked on testbench and testcase development. Worked on SPI Master and Slave Block for RFIC projects.
- Assisted in development of constrained random verification environment with functional and code coverage and development of scripts pertaining to simulations and regressions.
- Worked on regressions and simulations with RTL, Gate and Gate with SDF.