Physical Design Engineer Resume Samples

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Physical Design Engineers partake in research, analysis, design and testing with the goal of developing new products. Resumes in this field highlight such duties as creating bottom-up elements of chip design, including cell and block level custom layouts; assigning and planning complex layout assignments in the context of critical project milestone needs; and coding and maintaining layout automation features and macros in layout entry tools to improve layout quality and productivity. Example resumes indicate that to become a Physical Design Engineer, one must possess a bachelor's degree and, depending on the region and service provided, a license as well.

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1

Physical Design Engineer

Responsible for mechanical design and simulation of tunable semiconductor laser packages.

  • Conducted GD&T exercises and improved end-to-end yield by 33%.
  • Developed design concepts and supervised draftsmen in creation of 3D models, 2D detailed drawings and quality documents. Formulated and supervised execution of design verification and validation plans per industry standards.
  • Standardized the design by incorporating piece-parts common to different products, enabling sourcing/procurement to negotiate lower prices with suppliers.
  • Conducted rigorous FEA analysis and improved the opto-mechanical reliability of the products to eliminate future field returns.
  • Improved yield of solder-attach process by 20% using DOE and statistical analysis.
Candidate Info
2
years in
workforce
2
years
at this job
Engineering Mechanics
2

Physical Design Engineer

Designed timing driven layout of telecommunications integrated circuits with emphasis on timing closure. Performed place and route of digital IC's and large super blocks using state of the art CAD tools. Analyzed power and voltage drop results of chip designs.

  • Completed physical design layout of network processors, network switches, and telecommunication chips on or ahead of schedule with 100% accuracy.
  • Simultaneously worked across different departments within the company to meet customer needs and deadlines.
  • Place and route of a very complex timing control circuit with over 100 system clocks critical to chip performance and developed strategies to ensure design met timing constraints and correlated with engineering specifications.
  • Developed and administered internal web pages documenting flows, checklists and status for designs making important documentation readily accessible.
  • Verified design layout using numerous CAD tools and design specifications to prevent chip failure.
  • Interviewed, trained and mentored new employees, in all aspects of physical design and verification.
  • Checked work of peers using detailed checklists insuring 100% accuracy.
Candidate Info
28
years in
workforce
11
years
at this job
Computer Programming I And
Electronics Technology
3

Physical Design Engineer

  • Designed high performance cores that are replicated for use in next generation GPUs
  • Implemented innovative low power techniques that reduced chip cooling cost by $5M
  • Coordinated with RTL and Package teams to set and meet aggressive area targets that saved approx $12M in production cost compared to previous generation products.
  • Enhanced the design flow to improve its runtime from 12 to 8 hours, resulting in the reduction of the project timeline by 2 weeks.
  • Helped grow the team by interviewing, selecting and mentoring candidates. Assessed their skills and worked with management to develop task and growth plans.
Candidate Info
8
years in
workforce
7
years
at this job
BS
Electrical Engineering
MS
Electrical Engineering
4

Circuit/physical Design Engineer

Lead the testing group for ADSL technology project.

  • Designed a state of the art power board that allowed multiple connections for various adapters.
  • Redesigned circuit board for 4ESS frame that reduced cost of manufacturing by 15%.
  • QOS control with factory to ensure standards were met for any circuitry changes.
Candidate Info
5
years in
workforce
5
years
at this job
AAS
Electronics
BS
Business Management
MA
Master of Arts
5

Physical Design Engineer

Designed, edited, and enhanced custom high power integrated packages ranging from various BGA styles to Flip-Chip designs

  • Designed in both Windows and UNIX environments
  • Created drawings in MicroStation and Avanti design tools, and capture
  • Maintained files electronically and administer sister sites drawing file management
  • Assisted in the reworking design procedures and practices
  • Served as liaison in the creation of specialized CAD tools for place and route tools
  • Converted Unigraphic designs to MicroStation while tasked with assisting sister site with enhancing dual in-line product line
  • Successfully Co-designed a custom package on a joint company design utilizing two different design tools, ideology, CAD tools, and processes
Candidate Info
17
years in
workforce
4
years
at this job
AS
Electronic Engineering Technology
BS
Science And Technology
6

Physical Design Engineer

Design and development of Low Power SOC chips used in Cellular and Handheld applications.

  • Performed Physical Integration of large blocks ranging from 1M to 3M instances.
  • Designed and developed blocks from RTL to GDSII using a timing closure flow. The tasks include floorplanning of single and multiple power domain designs, place and route, CTS, sign-off physical verification
  • Evaluated and benchmarked study for area/timing/routability impact using 7 and 9 tracks library at 28nm process
  • Evaluated and benchmarked study for area savings using different metal stack configurations and 9 track library.
  • Enhanced methodology and APR flow for SOC physical design to improve productivity and QOR. Published the flow
Candidate Info
23
years in
workforce
4
years
at this job
BS
Electrical Engineering
MS
Electrical Engineering
7

Senior Physical Design Engineer

Developed and distributed the design flow for power analysis on a low power IC device.

  • Performed cost saving tests using various metallization options on a high speed I.C. device.
  • Interfaced with IP hardware vendors giving feedback for improvements on IP bocks.
  • Documented design flows and checklists for future use by engineering teams.
  • Designed power grids to power specifications of 3rd party custom digital blocks.
Candidate Info
13
years in
workforce
2
years
at this job
BS
Electronics Engineering Technlogy
MS
Engineering Management
8

Wireless Co-op (physical Design Engineer)

  • Thermally tested the effectiveness of air blocking plates and front blanks used inside LTE cabinets and created a matrix to determine the need for them.
  • Designed and created a multifunctional GPS splitter bracket used in LTE cabinets.
  • Modified a cabinet in Pro/E to reduce the cost by $100 per cabinet while meeting all the requirements.
  • Designed multiple sheet metal parts to be incorporated into a new LTE cabinet which includes a fiber tray, mounting bracket, cable entry plate, and a I/O hatch plate.
Candidate Info
4
years in
workforce
1
year
at this job
BS
Mechanical Engineering And Green Engineering
Mechanical Engineering
9

Physical Design Engineer/consultant

Utilized various place and route and verification tools to develop timing driven CDMA Technology Integrated Circuit Designs used in the cell phone industry.

  • Performed Auto place and route on entire IC design using EDA Design Tools.
  • Verified Integrated Circuit designs using IC verification tools.
  • Modified IC Physical Design Flow to ensure designs could be routed with minimal errors.
  • Verified Modem blocks of Raptor2 Chip using IC verification tools.
Candidate Info
11
years in
workforce
1
year
at this job
AS
Microcomputer Engineering Technology
AS
Electrical Engineering Technology
BS
Electrical Engineering Technology
10

ASIC Physical Design Engineer

Contributed to the successful tape-outs of 28nm, 40nm and 180nm technology nodes

  • Designed optimal floorplans enabling a smooth work flow for the rest of the project
  • Took blocks through placement, clock tree synthesis, and routing
  • Closed timing for block and chip level
  • Implemented physical verification for blocks and DRC for chip
  • Analyzed and applied low power techniques using switch cells
  • Executed physical and logical ECO for block and chip level
  • Wrote Perl/Tcl scripts for common tasks to improve work efficiency
  • Managed 2 interns
Candidate Info
5
years in
workforce
4
years
at this job
BS
Electrical Engineering

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